Date of last revision: 02/21/2000
Index:
SPICE is a general-purpose circuit simulation program for nonlinear dc, nonlinear transient, and linear ac analyses. Circuits may contain passive components (resistors, capacitors, inductors), active devices (transistors and diodes), and independent voltage and current source..., etc. In this tutorial, we will illustrate the use of the simulator with a CMOS inverter as shown in Fig.1 below.
In this figure, there are two transistors of the same dimensions, L = 1.2 u and W=3.6U and their gates are connected together at node #2.:
pch is the p-channel or PMOS transistor. Its terminals, drain, gate and source are connected to nodes #3, #2 and #1 respectively.
nch is the n-channel or NMOS transistor. Its terminals, drain, gate and source are connected to nodes #3, #2 and #0 respectively.
Node #0 is connected to ground, Node #1 is connected to the supply voltage, VCC, Node #2 is connected to the input, in, and node #3, the output and is connected to a load capacitance of 10P farads. This load represents the input capacitance of any other gate that is driven by the inverter and the value is arbitrarily chosen.
Figure 1. CMOS inverter transistors schematic
. /usr/local/scripts/setup.spice.sh
Remember to execute
$ . .profile
source/usr/local/scripts/setup.spice.sh
The first line of SPICE source code is the title line and will be ignored by Spice compiler. You may leave it blank , but it is preferable that you use it to identify your circuit.
Any subsequent line that starts with a black space of a * will be treated as remark line. Be careful !!
In the third line, M1 is the name given to the pch transitor shown in the Fig. 1. This is followed by the node numbers of the drain, gate, source and substrate of the transistor in this specific order. Thus node #3 refers to the drain, node #2 is the gate and node #1 connects the source and the substrate to the supply voltage VCC. These node numbers are exactly the same as shown in Fig. 1. Then PCH indicates that transistor M1 is of p-channel model defined on later in the files. In a similar fashion, the drain, gate, and source of the nch, M2, are connected respectively to #3, #2 and #0. The latest node is the ground. NCH refers to the model of this transistor. The other entries give the width and length of the channel. The next line describes how the load capacitance, C3, is connected accross the output, node #3 and ground, node #0.
Next the voltage sources are defined. VCC 1 0 DC=5.0, tell us that a DC source of 5V is applied accross node #1 and ground. Also, a voltage, VIN is applied at the gates of the transistors, node #2. The value of this source is then specified on the next line. VIN takes DC values between 0 and 5V in increments of 0.1V. This specification is for the DC sweep.
the lines starting with .MODEL define the transistor models, PCH and NCH. The example uses SPICE level 2. You may substitute this level by any other one. Some of the parameter used are the threshold voltage, the process transconductance, etc.
* CMOS Inverter Voltage Transfer Characteristic
*
M1 3 2 1 1 PCH W=3.6U L=1.2
M2 3 2 0 0 NCH W=3.6U L=1.2U
C3 3 0 10P
*
VCC 1 0 DC=5.0
* The following two line are for DC analysis
VIN 2 0
.DC VIN 0 5 0.1
*
.OPTIONS TEMP=25 METHOD=GEAR
.MODEL NCH NMOS (level=2 LD=0.15U TOX=200.0E-10 NSUB=5.37E+15
+ VTO=0.74 KP=8.0E-05 GAMMA=0.54 PHI=0.6 U0=656 UEXP=0.157 UCRIT=31444
+ DELTA=2.34 VMAX=55261 Xj=0.2U LAMBDA=0.037 NFS=1E+12 NEFF=1.001 NSS=1E+11
+ TPG=1.0 RSH=70.00 + CGDO=4.3E-10 CGSO=4.3E-10 Cj=0.0003 Mj=0.66
+ CJSW=8.0E-10 MJSW=0.24 PB=0.58
.MODEL PCH PMOS(level=2 LD=0.15U TOX=200.0E-10 NSUB=4.33E+15
+ VTO=-0.74 KP=2.70E-05 GAMMA=0.58 PHI=0.6 U0=262 UEXP=0.324 UCRIT=65720
+ DELTA=1.79 VMAX=25694 Xj=0.25U LAMBDA=0.061 NFS=1E+12 NEFF=1.001 NSS=1E+11
+ TPG=1.0 RSH=121.00 + CGDO=4.3E-10 CGSO=4.3E-10 Cj=0.0005 Mj=0.51
+ CJSW=1.35E-10 MJSW=0.24 PB=0.64
.END
Frr transient analysis , substitute the 'VIN 2 0' and '.DC VIN 0 5 0.1' with the following two statements where PWL stands for piecewise linear signal and
Vin 2 0 PWL(0 0 4N 0 4.1N 3 8N 3 8.1N 0)
.TRAN 0.1N 12N
For example, type
to start SPICE3 and load that example you have edited.
which indicate that you are inside the SPICE interactive environment.
running circuit ? --respond with y or n.
In this example, type:
will get the graph as shown in Fig. 2.
Figure 2. Plot for DC analysis
you will get the graph as shown in Fig 2a.
Figure 2a. IV curve for inverter
In this example, type:
will plot the Voltage versus Time diagram of node 3 on the screen as shown below.
Figure 3. Plot for time transient analysis while type :
will plot the Voltage versus Time diagram of node 3 and 2 on the same graph window as shown below.
Figure 4. command using plot v(3),v(2)
Figure 4a. Power analysis
Thereafter, all the numerical data will be save in ASCII format. Then type:
to save the numerical data. (DO NOT USE THE SAME NAME AS THE SPICE SOURCE CODE FILE, OR IT WILL BE OVERWRITTEN). The expression define the variable you want to be saved. If you omit it, all variable will be saved.
For example, if you want to save the analysis of node 3 to a file named node3.result, type:
If you want to save all the analysis of all the node to node_all.result , type:
then save the graph :
after this you will get the message:
type the variable you want the plot to be saved.(e.g.v(3),vdb(3),vp(1)).
For more variables on the same graph, say v(3) and v(2), type:
The plots of v(3) and v(2) will be saved in a file called all.plot.
For example, if you want to load the results saved in file node3.result, type:
the reuslt will be loaded. You may use plot v(3) to see the graph.
Printing is performed through the Open Spool facility. You have to exit SPICE using the quit command, and return to the UNIX environment to print and plot. (DO NOT FORGET TO SAVE YOUR RESULTS PRIOR TO THIS, OR YOU WILL NOT BE ABLE TO PRINT/PLOT THEM)
In this example, you may type as following to print out your numerical results.
or
In this example, you may type :