Sequential ATPG Tutorial

Marufa Kaniz, Matt Cole, Samiha Mourad


Date of last revision: 15/12/97

  1. Invoking Flextest
  2. Generating the Test Vectors
  3. Viewing and Saving the Results



1. Invoking Flextest

This tutorial gives an overview of using the sequential ATPG algorithm for generating test patterns on a sequential circuit without any scan circuitry. For this tutorial, we will use a schematic of a 4 bit counter (ud_counter) and the test library atglib listed in the tutorial.

  1. Copy the following files to that directory by entering the shell command:

    shell > cp -R /applications/webserver/docs/mentortu/UD_COUNTER .

  2. Copy the attributes file by entering the following shell command.

    shell> cp /applications/webserver/docs/mentortu/UD_COUNTER.mgc_component.attr .

  3. Cut and paste the test library given at the end of this page into a text editor and save it as atglib. Make sure that you save in the same directory that you execute flextest from.

  4. Make sure you are in the directory that you plan to execute flextest from and change the mentor graphics working directory to the current directory you are working in by typing the following shell command:

    shell> MGC_WD=`pwd`

    Note: Apostrophies are surrounding pwd and not single quotes


  5. To invoke Flextest enter the command shown below at the shell prompt. Make sure that the shell variable MGC_WD points to the directory that your edif file and test library are in.

    shell> flextest UD_COUNTER -eddm -lib atglib






Figure 1

  1. From the main menu bar select OPEN SHEET. You should see the window below in Figure 2.



Figure 2



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Test Library

model anotb (OUT, B, A) (

model aorbn (OUT, B, A) (

model dff (QBAR, Q, DATA, CLOCK) (

model dfsc (SCAN, QBAR, Q, DATA1, DATA, CLOCK) (

model dffr (RESET, QBAR, Q, DATA, CLOCK) (

model dfscr (SCAN, RESET, QBAR, Q, DATA1, DATA, CLOCK) (

model dffsr (SET, RESET, QBAR, Q, DATA, CLOCK) (

model dfscsr (SET, SCAN, RESET, QBAR, Q, DATA1, DATA0, CLOCK) (

model inv1 (OUT, IN1) (

model nd2x1 (OUT, IN2, IN1) (

model nd4 (OUT, IN4, IN3, IN2, IN1) (

model ndi2x1 (OUT2, OUT1, IN2, IN1) (

model nr3 (OUT, IN3, IN2, IN1) (

model xor (OUT, IN2, IN1) (


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