Mentor Graphics Design Architect Tutorial

Tien-Cheng Bau, Savitha Gandikota, and Jung Suk Yun

Samiha Mourad

Electrical Engineering Department

Date of last revision: 9/7/00

Index:

  1. Introduction
  2. Preparation
  3. Starting Design Architect
  4. Schematic Entry
  5. Check/Save the sheet
  6. Generate Symbol
  7. Hierarchical Design
  8. Editing Strokes
  9. Exit Mentor Graphics

1. Introduction

In this tutorial, we are going to create gate level schematic of a 1-bit Full Adder using Mentor Graphic's Design Architect. To simulate the design you have created please refer to Mentor Graphics QuickSimII tutorial.

In terms of its inputs the two outputs of the Full Adder can be stated as follows.

Sum =A xor B xor Cin
Cout=(A and B) or (B and Cin) or (A and Cin)


The schematic diagram of the above functions is shown below:

Fig 1-0. Schematic of 1-bit Full Adder


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2. Preparation

Note: The set of directives listed below is applicable to users of the Design Center, at Santa Clara University. If you are working in a different environment please check with your system administrator.
  1. Add the following lines in your .profile:

  2. . /usr/local/scripts/setup.mentor-C.2.sh

    SYNLIB=/LINKS/mentor/parts/cmosn_lib/autologic

    MGC_PLOT_DEFAULT_PRINTER=laser

    export MGC_PLOT_DEFAULT_PRINTER

    Remember to execute

    $ . .profile

  3. If using C-shell add the following lines in your .cshrc:

  4. source /usr/local/scripts/setup.mentor-C.2.csh

    setenv SYNLIB /LINKS/mentor/parts/cmosn_lib/autologic

    setenv MGC_PLOT_DEFAULT_PRINTER laser

    Remember to execute

    $ source .cshrc

(This is only necessary for the first time you change the settings in your .profile or .cshrc file.) 

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3. Starting Design Architect

  1. Invoke 'Design Manager' by typing:

  2. $ dmgr

    Note: The standard cell library with physical layout available for auto placing/routing is cmosn_lib. To use components from this library, please type $cmosn_dmgr instead.

  3. Double click 'design_arch' icon in the 'Tools' window shown below and wait for a couple of seconds, the 'Design Architect' window will appear.
  4. Fig 1-1. Starting Design Architect from Design Manager

  5. Select 'Open Sheet' in the 'Session Palette' window. A dialog box pops up as following
  6. Fig 1-2. Dialog box for open new sheet

  7. In the box labeled "Component Name" give the complete path as to where you want to create the component including the name of the component you will be creating (e.g. full adder).
  8. Leave other boxes untouched and click 'OK'. For an existing design, you may use the navigator to locate the component in your directories.

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4. Schematic Entry


4.1 Adding components, ports to the schematic

Note:The mouse has 3 buttons, right (RMB), left (LMB) and the middle (MMB) button. In general,
  1. To invoke the library palette from the Schematic menu bar, select
  2. Libraries -> MGC Digital Libraries

    Then select gen_lib from the right hand side palette. The components will be listed alphabetically in the palette.
  3. Select a component by clicking on the component name in the 'gen_lib'. Here we first select two input 'and' gate 'and2'. The symbol will appear in the symbol window in the top-right corner. Move the cursor into the schematic window and click the left mouse button at the position where you want the component to be placed.

  4. Note: pmos and nmos transistors are also available in this library. They function like switches while in digital simulator, but don't expect them to act like analog components. In other words, transistor schematic created here is only for 'schematic' purpose only, not for digital simulation.

    Note: To use analog components (e.g. pmos,nmos,capacitor, resistor,....etc.)in your schematic and perform analog simulation, please refer to the Accusim II tutorial for more detail.

  5. The outline of the component appears as a dashed white line. Click on the component again and the outline turns to a solid blue line.
  6. Fig 1-3. Select two input 'and' gate 'and2' and put it on sheet

  7. Add all the components in your circuit in the same manner. In this example, we need three input 'or' gates and two input 'xor' gates.

  8. Note:To zoom out schematic window:(in the schematic menu bar)

    view -> zoom out

  9. Ports are named 'portin' and 'portout' in 'gen_lib'
  10. After picking out all the required components, the sheet might look like the one in fig 4-2.
  11. Fig 1-4. Placing all the required components on the sheet


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